An unreleased AMD Ryzen 9 5900X3D engineering sample has surfaced in China, revealing a 12-core Zen 3 configuration that AMD apparently tested but never brought to retail. Images and monitoring-tool screenshots posted on the Chiphell forums show the processor with 12 cores, 24 threads and 128MB of total L3 cache. The unusual cache configuration suggests AMD experimented with placing 3D V-Cache on only one of the processor’s two CCDs years before that asymmetric approach became standard on later multi-chiplet X3D processors.
The engineering sample is identified by the part code 100-000000652 and belongs to AMD’s Vermeer family for the AM4 socket. A normal Ryzen 9 5900X has two six-core CCDs, each carrying 32MB of L3 cache for 64MB total. On the newly surfaced sample, one CCD reportedly has 96MB of L3 while the other retains its standard 32MB, producing the 128MB total reported by diagnostic software.
That makes the chip different from other unreleased Ryzen 9 X3D prototypes AMD has shown in the past. During a 2023 visit to AMD’s laboratories, Gamers Nexus was shown working Ryzen 9 5900X3D and Ryzen 9 5950X3D prototypes carrying 3D V-Cache on both CCDs, resulting in 192MB of total L3 cache. AMD had also demonstrated a Ryzen 9 5900X-based 3D V-Cache prototype at Computex 2021 while introducing the technology publicly.
The newly surfaced sample therefore appears to represent another branch of AMD’s early X3D development rather than simply the same prototype seen previously. With one stacked CCD and one conventional CCD, its layout closely resembles the design philosophy AMD later used for multi-CCD Ryzen 9 X3D processors on newer platforms. The additional cache can benefit gaming workloads that are sensitive to memory latency and repeated data access, while leaving another CCD without the added cache can provide more flexibility for clock speeds and other workloads.
Screenshots from the owner show the processor reaching approximately 4.65GHz in CPU-Z, with another monitoring utility reportedly recording around 4.73GHz. That is notably higher than the roughly 4.4GHz associated with some earlier dual-V-Cache Ryzen 9 5900X3D prototypes. The surfaced chip is still an engineering sample, however, so its observed frequencies should not be treated as specifications AMD ever intended for a commercial product.
Getting the processor running also appears to require unusually old firmware. According to the Chiphell owner, the sample would not boot correctly on a current motherboard BIOS and stopped with an error, while an older BIOS using SMU firmware version 56.70.0 allowed the chip to operate. The owner reportedly contacted ASRock about the possibility of adding support in a newer BIOS, underscoring how far removed the sample is from normal retail hardware.
AMD ultimately chose a much simpler Zen 3 X3D product strategy. The Ryzen 7 5800X3D became the first consumer Ryzen processor with 3D V-Cache in 2022, pairing eight cores with 96MB of L3 cache on a single CCD. That processor became particularly popular with gamers and remains notable enough that second-hand Ryzen 7 5800X3D hardware continues to circulate widely years after launch.
The Ryzen 9 5900X3D sample offers a clearer look at the experimentation that took place before AMD settled on the 5800X3D for AM4. Rather than immediately shipping a dual-chiplet X3D model, AMD appears to have evaluated several cache arrangements, clock-speed compromises and firmware configurations. The 128MB engineering sample suggests the company was already testing a one-stacked-CCD design during the Zen 3 era.
There are no meaningful gaming benchmarks for the surfaced sample, so it is impossible to say how it would have compared with the retail 5800X3D or standard Ryzen 9 5900X. Its significance is instead historical and architectural. The chip provides another piece of evidence that AMD explored the asymmetric X3D design much earlier than its eventual appearance in later Ryzen 9 products, while showing just how many experimental configurations can exist behind a single successful retail CPU.
